1. Field of the Invention
The present invention relates generally to current sensing circuits, and more particularly relates to a two-stage current sensing amplifier capable of detecting small differences in current between two resistances connected to the amplifier.
2. Description of the Prior Art
As described in the article entitled "A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell" (ISSCC 2000, Scheuerlein et al.), recent advances in magnetic materials have made magnetic memories, which employ a Magnetic Tunnel Junction (MTJ) memory element in each memory cell, viable contenders for the non-volatile memory market. Desirable characteristics of MTJ based memories include high integration density, high speed, low read power, and SER immunity. Features like these could also advantage MTJ based memories in traditional memory markets dominated by SRAM and DRAM technology. However, in order for an MTJ based memory to compete with these other entrenched technologies, its read access time must be reduced. The present state-of-the-art read access time is "10 ns," as noted in the paper by Scheuerlein et al. noted above. It is primarily dominated by the time required for sense amplifier circuits to detect the binary state of the data stored in the individual memory cells, once the cells have been selected for read access within the memory array grid.
There remains a need, therefore, in the field of current sensing circuitry, for a current sensing amplifier that not only significantly reduces sensing time, but also reduces the power consumed in the sensing operation. Furthermore, there is a need in the prior art for a current sensing amplifier that can be fabricated on a semiconductor chip using reduced physical area and having a reduced sensitivity to device mismatches, among other environmental factors.